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Vector processing is highly effective in boosting processor performance andefficiency for data-parallel workloads. In this paper, we present Ara2, thefirst fully open-source vector processor to support the RISC-V V 1.0 frozenISA. We evaluate Ara2's performance on a diverse set of data-parallel kernelsfor various problem sizes and vector-unit configurations, achieving an averagefunctional-unit utilization of 95% on the most computationally intensivekernels. We pinpoint performance boosters and bottlenecks, including the scalarcore, memories, and vector architecture, providing insights into the mainvector architecture's performance drivers. Leveraging the openness of thedesign, we implement Ara2 in a 22nm technology, characterize its PPA metrics onvarious configurations (2-16 lanes), and analyze its microarchitecture andimplementation bottlenecks. Ara2 achieves a state-of-the-art energy efficiencyof 37.8 DP-GFLOPS/W (0.8V) and 1.35GHz of clock frequency (critical path: ~40FO4 gates). Finally, we explore the performance and energy-efficiencytrade-offs of multi-core vector processors: we find that multiple vector coreshelp overcome the scalar core issue-rate bound that limits short-vectorperformance. For example, a cluster of eight 2-lane Ara2 (16 FPUs) achievesmore than 3x better performance than a 16-lane single-core Ara2 (16 FPUs) whenexecuting a 32x32x32 matrix multiplication, with 1.5x improved energyefficiency.

Ara2: Exploring Single- and Multi-Core Vector Processing with an Efficient RVV1.0 Compliant Open-Source Processor