English (United Kingdom)

https://curated-unify.zendy.io/wp-json/zendy-region/v1/featured_content/oa?rat=en

https://curated-unify.zendy.io/wp-json/zendy-region/v1/highlighted_journal/

Global: Zendy Plus annual

Presents the access of premium content as premium feature

Premium Content

Presents the keyphrase highlighting as premium feature

Keyphrase Highlighting

Presents the summarisation as premium feature

Summarisation

Insights

Presents the pdf analysis as premium feature

PDF Analysis

Presents the zaia usage as premium feature

ZAIA

Global: Zendy Plus monthly

Global: Zendy Tools annual

Global: Zendy Tools monthly

Global: Zendy Free Plan

Ultra-thin (UT) oxide semiconductors are promising candidates forback-end-of-line (BEOL) compatible transistors and monolithic three-dimensionalintegration. Experimentally, UT indium oxide (In$_2$O$_3$) field-effecttransistors (FETs) with thicknesses down to 0.4 nm exhibits extremely highdrain current (10000 $\mu$A/$\mu$m) and transconductance (4000 $\mu$S/$\mu$m).Here, we employ the ab initio quantum transport simulation to investigate theperformance limit of sub-5-nm gate length (Lg) UT In$_2$O$_3$ FET. Based on theInternational Technology Roadmap for Semiconductors (ITRS) criteria forhigh-performance (HP) devices, the scaling limit of UT In$_2$O$_3$ FETs canreach 2 nm in terms of on-state current, delay time, and power dissipation. Thewide bandgap nature of UT In$_2$O$_3$ (3.15 eV) renders it a suitable candidatefor ITRS low-power (LP) electronics with Lg down to 3 nm. Both the HP and LP UTIn$_2$O$_3$ FETs exhibit superior energy-delay products as compared to othercommon 2D semiconductors such as monolayer MoS2 and MoTe2. Our study unveilsthe immense promise of UT In$_2$O$_3$ for both HP and LP device applications.

Sub-5-nm Ultra-thin In$_2$O$_3$ Transistors for High-Performance and Low-Power Electronic Applications