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DRAM read disturbance is a significant and worsening safety, security, andreliability issue of modern DRAM chips that can be exploited to break memoryisolation. Two prominent examples of read-disturb phenomena are RowHammer andRowPress. However, no prior work extensively studies read-disturb phenomena inmodern high-bandwidth memory (HBM) chips. In this work, we experimentallydemonstrate the effects of read disturbance and uncover the inner workings ofundocumented in-DRAM read disturbance mitigation mechanisms in HBM.  Our characterization of six real HBM2 DRAM chips shows that (1) the number ofread disturbance bitflips and the number of row activations needed to inducethe first read disturbance bitflip significantly varies between different HBM2chips and different 3D-stacked channels, pseudo channels, banks, and rowsinside an HBM2 chip. (2) The DRAM rows at the end and in the middle of a DRAMbank exhibit significantly fewer read disturbance bitflips than the rest of therows. (3) It takes fewer additional activations to induce more read disturbancebitflips in a DRAM row if the row exhibits the first bitflip already at arelatively high activation count. (4) HBM2 chips exhibit read disturbancebitflips with only two row activations when rows are kept active for anextremely long time.  We show that a modern HBM2 DRAM chip implements undocumented read disturbancedefenses that can track potential aggressor rows based on how many times theyare activated, and refresh their victim rows with every 17 periodic refreshoperations. We draw key takeaways from our observations and discuss theirimplications for future read disturbance attacks and defenses. We explain howour findings could be leveraged to develop both i) more powerful readdisturbance attacks and ii) more efficient read disturbance defense mechanisms.

Understanding Read Disturbance in High Bandwidth Memory: An Experimental Analysis of Real HBM2 DRAM Chips