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Despite the growing interest in ML-guided EDA tools from RTL to GDSII, thereare no standard datasets or prototypical learning tasks defined for the EDAproblem domain. Experience from the computer vision community suggests thatsuch datasets are crucial to spur further progress in ML for EDA. Here wedescribe our experience curating two large-scale, high-quality datasets forVerilog code generation and logic synthesis. The first, VeriGen, is a datasetof Verilog code collected from GitHub and Verilog textbooks. The second,OpenABC-D, is a large-scale, labeled dataset designed to aid ML for logicsynthesis tasks. The dataset consists of 870,000 And-Inverter-Graphs (AIGs)produced from 1500 synthesis runs on a large number of open-source hardwareprojects. In this paper we will discuss challenges in curating, maintaining andgrowing the size and scale of these datasets. We will also touch upon questionsof dataset quality and security, and the use of novel data augmentation toolsthat are tailored for the hardware domain.

Towards the Imagenets of ML4EDA