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Memristor-aided logic (MAGIC) design style holds a high promise for realizingdigital logic-in-memory functionality. The ability to implement a specific gatein a MAGIC design style hinges on the SET-to-RESET threshold ratio. The TaOxmemristive devices exhibit distinct SET-to-RESET ratios, enabling theimplementation of OR and NOT operations. As the adoption of the MAGIC designstyle gains momentum, it becomes crucial to understand the breakdown of energyconsumption in the various phases of its operation. This paper presentsexperimental demonstrations of the OR and NOT gates on a 1T1R crossbar array.Additionally, it provides insights into the energy distribution for performingthese operations at different stages. Through our experiments across differentgates, we found that the energy consumption is dominated by initialization inthe MAGIC design style. The energy split-up is 14.8%, 85%, and 0.2% forexecution, initialization, and read operations respectively.

Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array