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Time-Sensitive Networking (TSN) is a promising industrial Internet of Thingstechnology. Clock synchronization provides unified time reference, which iscritical to the deterministic communication of TSN. However, changes ininternal network status and external work environments of devices both degradepractical synchronization performance. This paper proposes atemperature-resilient architecture considering delay asymmetry (TACD) toenhance the timing accuracy under the impacts of internal delay and externalthermal changes. In TACD, an anti-delay-asymmetry method is developed, whichemploys a partial variational Bayesian algorithm to promote adaptability tonon-stationary delay variation. An optimized skew estimator is furtherproposed, fusing the temperature skew model for ambiance perception with thetraditional linear clock model to compensate for nonlinear error caused bytemperature changes. Theoretical derivation of skew estimation lower boundproves the promotion of optimal accuracy after the fusion of clock models.Evaluations based on measured delay data demonstrate accuracy advantagesregardless of internal or external influences.

Resilient Clock Synchronization Architecture for Industrial Time-Sensitive Networking