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Motivation: Read mapping is a computationally expensive process and a majorbottleneck in genomics analyses. The performance of read mapping is mainlylimited by the performance of three key computational steps: Index Querying,Seed Chaining, and Sequence Alignment. The first step is dominated by how fastand frequent it accesses the main memory (i.e., memory-bound), while the lattertwo steps are dominated by how fast the CPU can compute theircomputationally-costly dynamic programming algorithms (i.e., compute-bound).Accelerating these three steps by exploiting new algorithms and new hardwaredevices is essential to accelerate most genome analysis pipelines that widelyuse read mapping. Given the large body of work on accelerating SequenceAlignment, this work focuses on significantly improving the remaining steps.Results: We introduce GateSeeder, the first CPU-FPGA-based near-memoryacceleration of both short and long read mapping. GateSeeder exploitsnear-memory computation capability provided by modern FPGAs that couple areconfigurable compute fabric with high-bandwidth memory (HBM) to overcome thememory-bound and compute-bound bottlenecks. GateSeeder also introduces a newlightweight algorithm for finding the potential matching segment pairs. Usingreal ONT, HiFi, and Illumina sequences, we experimentally demonstrate thatGateSeeder outperforms Minimap2, without performing sequence alignment, by upto 40.3x, 4.8x, and 2.3x, respectively. When performing read mapping withsequence alignment, GateSeeder outperforms Minimap2 by 1.15-4.33x (using KSW2)and by 1.97-13.63x (using WFA-GPU). Availability:https://github.com/CMU-SAFARI/GateSeeder

GateSeeder: Near-memory CPU-FPGA Acceleration of Short and Long Read Mapping