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Neural Networks (NN) provide a solid and reliable way of executing differenttypes of applications, ranging from speech recognition to medical diagnosis,speeding up onerous and long workloads. The challenges involved in theirimplementation at the edge include providing diversity, flexibility, andsustainability. That implies, for instance, supporting evolving applicationsand algorithms energy-efficiently. Using hardware or software accelerators candeliver fast and efficient computation of the \acp{nn}, while flexibility canbe exploited to support long-term adaptivity. Nonetheless, handcrafting an NNfor a specific device, despite the possibility of leading to an optimalsolution, takes time and experience, and that's why frameworks for hardwareaccelerators are being developed. This work-in-progress study focuses onexploring the possibility of combining the toolchain proposed by Ratto et al.,which has the distinctive ability to favor adaptivity, with approximatecomputing. The goal will be to allow lightweight adaptable NN inference onFPGAs at the edge. Before that, the work presents a detailed review ofestablished frameworks that adopt a similar streaming architecture for futurecomparison.

ONNX-to-Hardware Design Flow for the Generation of Adaptive Neural-Network Accelerators on FPGAs