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Quantum computing has proven to be capable of accelerating many algorithms byperforming tasks that classical computers cannot. Currently, Noisy IntermediateScale Quantum (NISQ) machines struggle from scalability and noise issues torender a commercial quantum computer. However, the physical and softwareimprovements of a quantum computer can efficiently control quantum gate noise.As the complexity of quantum algorithms and implementation increases, softwarecontrol of quantum circuits may lead to a more intricate design. Consequently,the verification of quantum circuits becomes crucial in ensuring thecorrectness of the compilation, along with other processes, including quantumerror correction and assertions, that can increase the fidelity of quantumcircuits. In this paper, we propose a Decision Diagram-based quantumequivalence checking approach, QuBEC, that requires less latency compared toexisting techniques, while accounting for circuits with quantum errorcorrection redundancy. Our proposed methodology reduces verification time oncertain benchmark circuits by up to $271.49 \times$, while the number ofDecision Diagram nodes required is reduced by up to $798.31 \times$, comparedto state-of-the-art strategies. The proposed QuBEC framework can contribute tothe advancement of quantum computing by enabling faster and more efficientverification of quantum circuits, paving the way for the development of largerand more complex quantum algorithms.

QuBEC: Boosting Equivalence Checking for Quantum Circuits with QEC Embedding