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Deep learning (DL) for network models have achieved excellent performance inthe field and are becoming a promising component in future intelligent networksystem. Programmable in-network computing device has great potential to deployDL for network models, however, existing device cannot afford to run a DLmodel. The main challenges of data-plane supporting DL-based network models liein computing power, task granularity, model generality and feature extracting.  To address above problems, we propose Octopus: a heterogeneous in-networkcomputing accelerator enabling DL for network models. A feature extractor isdesigned for fast and efficient feature extracting. Vector accelerator andsystolic array work in a heterogeneous collaborative way, offeringlow-latency-highthroughput general computing ability for packet-and-flow-basedtasks. Octopus also contains on-chip memory fabric for storage and connecting,and Risc-V core for global controlling. The proposed Octopus accelerator designis implemented on FPGA. Functionality and performance of Octopus are validatedin several use-cases, achieving performance of 31Mpkt/s feature extracting,207ns packet-based computing latency, and 90kflow/s flow-based computingthroughput.

Octopus: A Heterogeneous In-network Computing Accelerator Enabling Deep Learning for network