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This paper investigates the impact of memory orientation on the bias patternof SRAM-based PUFs. We designed and fabricated a 65nm CMOS chip that containseleven SRAM macros that exercise different memory- and chip-level parameters.At the memory level, several parameters passed to the SRAM compiler areconsidered, including the number of addresses, the number of words, the aspectratio, and the chosen bitcell. Chip-level decisions are considered during thefloorplan, including the location and rotation of each SRAM macro in thetestchip. In this study, we conduct a comprehensive analysis of differentmemory orientations and their effect on the biasing direction. Physicalmeasurements performed on 50 fabricated chips revealed that specific memoryorientations, namely R270 and MY90, exhibit a distinct negative biasingdirection compared to other orientations. Importantly, this biasing directionremains consistent regardless of memory type, column mux ratio, memory size, orthe utilization of SRAMs with different bitcells. Overall, this studyhighlights the significance of careful physical implementation and memoryorientation selection in designing SRAM-based PUFs. Our findings can guidedesigners in the selection of SRAM memories with properties that make forbetter PUFs that potentially require less error correction effort to compensatefor instability.

Impact of Orientation on the Bias of SRAM-Based PUFs