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In the third round of the NIST Post-Quantum Cryptography standardizationproject, the focus is on optimizing software and hardware implementations ofcandidate schemes. The winning schemes are CRYSTALS Kyber and CRYSTALSDilithium, which serve as a Key Encapsulation Mechanism (KEM) and DigitalSignature Algorithm (DSA), respectively. This study utilizes the TaPaSCoopen-source framework to create hardware building blocks for both schemes usingHigh-level Synthesis (HLS) from minimally modified ANSI C software referenceimplementations across all security levels. Additionally, a generic TaPaSCohost runtime application is developed in Rust to verify their functionalitythrough the standard NIST interface, utilizing the corresponding Known AnswerTest mechanism on actual hardware. Building on this foundation, thecommunication overhead for TaPaSCo hardware accelerators on PCIe-connected FPGAdevices is evaluated and compared with previous work and optimized AVX2software reference implementations. The results demonstrate the feasibility ofverifying and evaluating the performance of Post-Quantum Cryptographyaccelerators on real hardware using TaPaSCo. Furthermore, the off-chipaccelerator communication overhead of the NIST standard interface is measured,which, on its own, outweighs the execution wall clock time of the optimizedsoftware reference implementation of Kyber at Security Level 1.

PQC-HA: A Framework for Prototyping and In-Hardware Evaluation of Post-Quantum Cryptography Hardware Accelerators