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The sparse matrix/vector product (SpMV) is a fundamental operation inscientific computing. Having access to an efficient SpMV implementation istherefore critical, if not mandatory, to solve challenging numerical problems.The ARM-based AFX64 CPU is a modern hardware component that equips one of thefastest supercomputers in the world. This CPU supports the Scalable VectorExtension (SVE) vectorization technology, which has been less investigated thanthe classic x86 instruction set architectures. In this paper, we describe howwe ported the SPC5 SpMV framework on AFX64 by converting AVX512 kernels to SVE.In addition, we present performance results by comparing our kernels against astandard CSR kernel for both Intel-AVX512 and Fujitsu-ARM-SVE architectures.

SPC5: an efficient SpMV framework vectorized using ARM SVE and x86 AVX-512