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Graph Neural Networks (GNNs) are becoming increasingly popular forvision-based applications due to their intrinsic capacity in modelingstructural and contextual relations between various parts of an image frame. Onanother front, the rising popularity of deep vision-based applications at theedge has been facilitated by the recent advancements in heterogeneousmulti-processor Systems on Chips (MPSoCs) that enable inference underreal-time, stringent execution requirements. By extension, GNNs employed forvision-based applications must adhere to the same execution requirements. Yetcontrary to typical deep neural networks, the irregular flow of graph learningoperations poses a challenge to running GNNs on such heterogeneous MPSoCplatforms. In this paper, we propose a novel unified design-mapping approachfor efficient processing of vision GNN workloads on heterogeneous MPSoCplatforms. Particularly, we develop MaGNAS, a mapping-aware Graph NeuralArchitecture Search framework. MaGNAS proposes a GNN architectural design spacecoupled with prospective mapping options on a heterogeneous SoC to identifymodel architectures that maximize on-device resource efficiency. To achievethis, MaGNAS employs a two-tier evolutionary search to identify optimal GNNsand mapping pairings that yield the best performance trade-offs. Throughdesigning a supernet derived from the recent Vision GNN (ViG) architecture, weconducted experiments on four (04) state-of-the-art vision datasets using both(i) a real hardware SoC platform (NVIDIA Xavier AGX) and (ii) aperformance/cost model simulator for DNN accelerators. Our experimental resultsdemonstrate that MaGNAS is able to provide 1.57x latency speedup and is 3.38xmore energy-efficient for several vision datasets executed on the Xavier MPSoCvs. the GPU-only deployment while sustaining an average 0.11% accuracyreduction from the baseline.

MaGNAS: A Mapping-Aware Graph Neural Architecture Search Framework for Heterogeneous MPSoC Deployment