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Reconfigurable intelligent surface (RIS) is an emerging technology allowingto control the propagation environment in wireless communications. Recently,beyond diagonal RIS (BD-RIS) has been proposed to reach higher performance thanconventional RIS, at the expense of higher circuit complexity. Multiple BD-RISarchitectures have been developed with the goal of reaching a favorabletrade-off between performance and circuit complexity. However, the fundamentallimits of this trade-off are still unexplored. In this paper, we fill this gapby deriving the expression of the Pareto frontier for theperformance-complexity trade-off in BD-RIS. Additionally, we characterize theoptimal BD-RIS architectures reaching this Pareto frontier.

Pareto Frontier for the Performance-Complexity Trade-off in Beyond Diagonal Reconfigurable Intelligent Surfaces