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Superconducting logic is fast and energy-efficient relative to CMOS, but alsofundamental studies are needed to scale up circuits for greater utility.Recently, ballistic shift registers for single-flux quanta (SFQ) bits wereshown in simulation to allow high-efficiency superconducting gates. However,these gates are unpowered such that the bits slow after each gate operation andonly a short sequence of gates is possible without added power. Here we showthat a circuit based on an Aharonov-Casher ring can power these shift registersby boosting the bit velocity to a constant value, despite their unusual bitstates constituted by two polarities of SFQ. As a step in its operation, eachbit state is forced into a different ring arm and then accelerated. The circuitdynamics depend on various circuit parameters and choices of how to merge thebit-state paths. One design from each merge design choice is proposed to enablescaling up to an array of gates by adding serial biasing in a relatively simpleway. We find adequate performance for ballistic logic in terms of boostedvelocity, energy efficiency, and parameter margins. We also discuss thecircuit's classical barriers; in a different regime this relates to theAharonov-Casher effect.

Boosting fluxons for ballistic-logic power using an Aharonov-Casher ring