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The \emph{MIDNA} application specific integrated circuit (ASIC) is askipper-CCD readout chip fabricated in a 65 nm LP-CMOS process that is capableof working at cryogenic temperatures. The chip integrates four front-endchannels that process the skipper-CCD signal and performs differentialaveraging using a dual slope integration (DSI) circuit. Each readout channelcontains a pre-amplifier, a DC restorer, and a dual-slope integrator withchopping capability. The integrator chopping is a key system design element inorder to mitigate the effect of low-frequency noise produced by the integratoritself, and it is not often required with standard CCDs. Each channel consumes4.5 mW of power, occupies 0.156 mm${^2}$ area and has an input referred noiseof 2.7${\mu\nu}_{rms}$. It is demonstrated experimentally to achievesub-electron noise when coupled with a skipper-CCD by means of averagingsamples of each pixel. Sub-electron noise is shown in three differentacquisition approaches. The signal range is 6000 electrons. The readout systemachieves 0.2${e^{-}}$ RMS by averaging 1000 samples with MIDNA both at roomtemperature and at 180 Kelvin.

A Sub-Electron-Noise Multi-Channel Cryogenic Skipper-CCD Readout ASIC