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Fault-Aware Training (FAT) has emerged as a highly effective technique foraddressing permanent faults in DNN accelerators, as it offers fault mitigationwithout significant performance or accuracy loss, specifically at low andmoderate fault rates. However, it leads to very high retraining overheads,especially when used for large DNNs designed for complex AI applications.Moreover, as each fabricated chip can have a distinct fault pattern, FAT isrequired to be performed for each faulty chip individually, considering itsunique fault map, which further aggravates the problem. To reduce the overheadsof FAT while maintaining its benefits, we propose (1) the concepts ofresilience-driven retraining amount selection, and (2) resilience-drivengrouping and fusion of multiple fault maps (belonging to different chips) toperform consolidated retraining for a group of faulty chips. To realize theseconcepts, in this work, we present a novel framework, eFAT, that computes theresilience of a given DNN to faults at different fault rates and with differentlevels of retraining, and it uses that knowledge to build a resilience mapgiven a user-defined accuracy constraint. Then, it uses the resilience map tocompute the amount of retraining required for each chip, considering its uniquefault map. Afterward, it performs resilience and reward-driven grouping andfusion of fault maps to further reduce the number of retraining iterationsrequired for tuning the given DNN for the given set of faulty chips. Wedemonstrate the effectiveness of our framework for a systolic array-based DNNaccelerator experiencing permanent faults in the computational array. Ourextensive results for numerous chips show that the proposed techniquesignificantly reduces the retraining cost when used for tuning a DNN formultiple faulty chips.

eFAT: Improving the Effectiveness of Fault-Aware Training for Mitigating Permanent Faults in DNN Hardware Accelerators