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During the past decade, Deep Learning (DL) algorithms, programming systemsand hardware have converged with the High Performance Computing (HPC)counterparts. Nevertheless, the programming methodology of DL and HPC systemsis stagnant, relying on highly-optimized, yet platform-specific and inflexiblevendor-optimized libraries. Such libraries provide close-to-peak performance onspecific platforms, kernels and shapes thereof that vendors have dedicatedoptimizations efforts, while they underperform in the remaining use-cases,yielding non-portable codes with performance glass-jaws. This work introduces aframework to develop efficient, portable DL and HPC kernels for modern CPUarchitectures. We decompose the kernel development in two steps: 1) Expressingthe computational core using Tensor Processing Primitives (TPPs): a compact,versatile set of 2D-tensor operators, 2) Expressing the logical loops aroundTPPs in a high-level, declarative fashion whereas the exact instantiation(ordering, tiling, parallelization) is determined via simple knobs. Wedemonstrate the efficacy of our approach using standalone kernels andend-to-end workloads that outperform state-of-the-art implementations ondiverse CPU platforms.

Harnessing Deep Learning and HPC Kernels via High-Level Loop and Tensor Abstractions on CPU Architectures