English (United Kingdom)

https://curated-unify.zendy.io/wp-json/zendy-region/v1/featured_content/oa?rat=en

https://curated-unify.zendy.io/wp-json/zendy-region/v1/highlighted_journal/

Global: Zendy Plus annual

Presents the access of premium content as premium feature

Premium Content

Presents the keyphrase highlighting as premium feature

Keyphrase Highlighting

Presents the summarisation as premium feature

Summarisation

Insights

Presents the pdf analysis as premium feature

PDF Analysis

Presents the zaia usage as premium feature

ZAIA

Global: Zendy Plus monthly

Global: Zendy Tools annual

Global: Zendy Tools monthly

Global: Zendy Free Plan

Sparse matrices and linear algebra are at the heart of scientificsimulations. Over the years, more than 70 sparse matrix storage formats havebeen developed, targeting a wide range of hardware architectures and matrixtypes, each of which exploit the particular strengths of an architecture, orthe specific sparsity patterns of the matrices.  In this work, we explore the suitability of storage formats such as COO, CSRand DIA for emerging architectures such as AArch64 CPUs and FPGAs. In addition,we detail hardware-specific optimisations to these targets and evaluate thepotential of each contribution to be integrated into Morpheus, a modern librarythat provides an abstraction of sparse matrices (currently) across x86 CPUs andNVIDIA/AMD GPUs. Finally, we validate our work by comparing the performance ofthe Morpheus-enabled HPCG benchmark against vendor-optimised implementations.

Morpheus unleashed: Fast cross-platform SpMV on emerging architectures