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While non-volatile memories (NVMs) provide several desirable characteristicslike better density and comparable energy efficiency than DRAM, DRAM-likeperformance, and disk-like durability, the limited endurance NVMs manifestremains a challenge with these memories. Indeed, the endurance constraints ofNVMs can prevent solutions that are commonly employed for other mainstreammemories like DRAM from being carried over as-is to NVMs. Specifically, in thiswork we observe that, Oblivious RAM (ORAM) primitive, the state-ofart solutionto tackle memory bus side channel vulnerability, while widely studied forDRAMs, is particularly challenging to implement as-is for NVMs as it severelyaffects endurance of NVMs. This is so, as the inherent nature of ORAM primitivecauses an order of magnitude increase in write traffic and furthermore, causessome regions of memory to be written far more often than others. Thisnon-uniform write traffic as manifested by ORAM primitive stands to severelyaffect the lifetime of non-volatile memories (1% of baseline without ORAM) toeven make it impractical to address this security vulnerability

Egalitarian ORAM: Wear-Leveling for ORAM