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Tensor processing units (TPUs), specialized hardware accelerators for machinelearning tasks, have shown significant performance improvements when executingconvolutional layers in convolutional neural networks (CNNs). However, theystruggle to maintain the same efficiency in fully connected (FC) layers,leading to suboptimal hardware utilization. In-memory analog computing (IMAC)architectures, on the other hand, have demonstrated notable speedup inexecuting FC layers. This paper introduces a novel, heterogeneous,mixed-signal, and mixed-precision architecture that integrates an IMAC unitwith an edge TPU to enhance mobile CNN performance. To leverage the strengthsof TPUs for convolutional layers and IMAC circuits for dense layers, we proposea unified learning algorithm that incorporates mixed-precision trainingtechniques to mitigate potential accuracy drops when deploying models on theTPU-IMAC architecture. The simulations demonstrate that the TPU-IMACconfiguration achieves up to $2.59\times$ performance improvements, and $88\%$memory reductions compared to conventional TPU architectures for various CNNmodels while maintaining comparable accuracy. The TPU-IMAC architecture showspotential for various applications where energy efficiency and high performanceare essential, such as edge computing and real-time processing in mobiledevices. The unified training algorithm and the integration of IMAC and TPUarchitectures contribute to the potential impact of this research on thebroader machine learning landscape.

Heterogeneous Integration of In-Memory Analog Computing Architectures with Tensor Processing Units