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To increase the science rate for high data rates/volumes, Thomas JeffersonNational Accelerator Facility (JLab) has partnered with Energy Sciences Network(ESnet) to define an edge to data center traffic shaping / steering transportcapability featuring data event-aware network shaping and forwarding. Thekeystone of this ESnet JLab FPGA Accelerated Transport (EJFAT) is the jointdevelopment of a dynamic compute work Load Balancer (LB) of UDP streamed data.The LB is a suite consisting of a Field Programmable Gate Array (FPGA)executing the dynamically configurable, low fixed latency LB data planefeaturing real-time packet redirection at high throughput, and a control planerunning on the FPGA host computer that monitors network and compute farmtelemetry in order to make dynamic decisions for destination compute hostredirection / load balancing.

EJ-FAT Joint ESnet JLab FPGA Accelerated Transport Load Balancer