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Recent years have seen a rapid increase in research activity in the field ofDRAM-based Processing-In-Memory (PIM) accelerators, where the analog computingcapability of DRAM is employed by minimally changing the inherent structure ofDRAM peripherals to accelerate various data-centric applications. SeveralDRAM-based PIM accelerators for Convolutional Neural Networks (CNNs) have alsobeen reported. Among these, the accelerators leveraging in-DRAM stochasticarithmetic have shown manifold improvements in processing latency andthroughput, due to the ability of stochastic arithmetic to convertmultiplications into simple bit-wise logical AND operations. However,the use ofin-DRAM stochastic arithmetic for CNN acceleration requires frequent stochasticto binary number conversions. For that, prior works employ full adder-based orserial counter based in-DRAM circuits. These circuits consume large area andincur long latency. Their in-DRAM implementations also require heavymodifications in DRAM peripherals, which significantly diminishes the benefitsof using stochastic arithmetic in these accelerators. To address theseshortcomings, this paper presents a new substrate for in-DRAMstochastic-to-binary number conversion called AGNI. AGNI makes minormodifications in DRAM peripherals using pass transistors, capacitors, encoders,and charge pumps, and re-purposes the sense amplifiers as voltage comparators,to enable in-situ binary conversion of input statistic operands of differentsizes with iso latency.

AGNI: In-Situ, Iso-Latency Stochastic-to-Binary Number Conversion for In-DRAM Deep Learning