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Edge computing must be capable of executing computationally intensivealgorithms, such as Deep Neural Networks (DNNs) while operating within aconstrained computational resource budget. Such computations involve MatrixVector Multiplications (MVMs) which are the dominant contributor to the memoryand energy budget of DNNs. To alleviate the computational intensity and storagedemand of MVMs, we propose circuit-algorithm co-design techniques withlow-complexity approximate Multiply-Accumulate (MAC) units derived from theprinciples of Alphabet Set Multipliers (ASMs). Selection of few and properalphabets from ASMs lead to a Multiplier-less DNN implementation, and enablesencoding of low precision weights and input activations into fewer bits. Tomaintain accuracy under alphabet set approximations, we developed a novelASM-alphabet aware training. The proposed low-complexity multiplication-awarealgorithm was implemented In-Memory and Near-Memory with efficient shiftoperations to further improve the data-movement cost between memory andprocessing unit. We benchmark our design on CIFAR10 and ImageNet datasets forResNet and MobileNet models and attain <1-2% accuracy degradation against fullprecision with energy benefits of >50% compared to standard Von-Neumanncounterpart.

HADES: Hardware/Algorithm Co-design in DNN accelerators using Energy-efficient Approximate Alphabet Set Multipliers