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Recent advances in quantum computing pose a serious threat on the security ofwidely used public-key cryptosystems. Thus, new post-quantum cryptographicalgorithms have been proposed as part of the associated US NIST process toenable secure, encrypted communication in the age of quantum computing. Manyhardware accelerators for structured lattice-based algorithms have already beenpublished to meet the strict power, area and latency requirements of low-powerIoT edge devices. However, the security of these algorithms is still uncertain.Currently, many new attacks against the lattice structure are investigated tojudge on their security. In contrast, code-based algorithms, which rely ondeeply explored security metrics and are appealing candidates in the NISTprocess, have not yet been investigated to the same depth in the context of IoTdue to the computational complexity and memory footprint of state-of-the-artsoftware implementations.  In this paper, we present to the best of our knowledge the first HW/SWco-design based implementation of the code-based Hamming Quasi CyclicKey-Encapsulation Mechanism. We profile and evaluate this algorithm in order toexplore the trade-off between software optimizations, tightly coupled hardwareacceleration by instruction set extension and modular, loosely coupledaccelerators. We provide detailed results on the energy consumption andperformance of our design and compare it to existing implementations oflattice- and code-based algorithms. The design was implemented in twotechnologies: FPGA and ASIC. Our results show that code-based algorithms arevalid alternatives in low-power IoT from an implementation perspective.

Code-based Cryptography in IoT: A HW/SW Co-Design of HQC