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Analog-to-digital converters (ADCs) are key components of digital signalprocessing. Classical samplers in this framework are controlled by a globalclock. At high sampling rates, clocks are expensive and power-hungry, thusincreasing the cost and energy consumption of ADCs. It is, therefore, desirableto sample using a clock-less ADC at the lowest possible rate. Anintegrate-and-fire time-encoding machine (IF-TEM) is a time-basedpower-efficient asynchronous design that is not synced to a global clock.Finite-rate-of-innovation (FRI) signals, ubiquitous in various applications,have fewer degrees of freedom than the signal's Nyquist rate, enablingsub-Nyquist sampling signal models. This work proposes a power-efficient IF-TEMADC architecture and demonstrates sub-Nyquist sampling and FRI signal recovery.Using an IF-TEM, we implement in hardware the first sub-Nyquist time-basedsampler. We offer a feasible approach for accurately estimating the FRIparameters from IF-TEM data. The suggested hardware and reconstruction approachretrieves FRI parameters with an error of up to -25dB while operating at ratesapproximately 10 times lower than the Nyquist rate, paving the way to low-powerADC architectures.

Hardware Prototype of a Time-Encoding Sub-Nyquist ADC