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Transferring composite data structures with variable-length fields oftenrequires designing non-trivial protocols that are not compatible betweenhardware designs. When each project designs its own data format and protocolsthe ability to collaborate between hardware developers is diminished, which isan issue especially in the open-source community. Because the high-levelmeaning of a protocol is often lost in translation to low-level languages whena custom protocol needs to be designed, extra documentation is required, theinterpretation of which introduces new opportunities for errors. The Tydispecification (Tydi-spec) was proposed to address the above issues by codifyingthe composite and variable-length data structures in a type and providing astandard protocol to transfer typed data among hardware components. The Tydiintermediate representation (Tydi-IR) extends the Tydi-spec by defining typedinterfaces, typed components, and connections among typed components.  In this thesis, we propose Tydi-lang, a high-level hardware descriptionlanguage (HDL) for streaming designs. The language incorporates Tydi-spec todescribe typed streams and provides templates to describe abstract reusablecomponents. We also implement an open-source compiler from Tydi-lang toTydi-IR. We leverage a Tydi-IR to VHDL compiler, and also present a simulatorblueprint to identify streaming bottlenecks. We show several Tydi-lang examplesto translate high-level SQL to VHDL to demonstrate that Tydi-lang canefficiently raise the level of abstraction and reduce design effort.

Tydi-lang: a language for typed streaming hardware -- A manual for future Tydi-lang compiler developers