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Building upon existing signal processing techniques and open-source software,this paper presents a baseline design for an RF System-on-Chip FrequencyDivision Multiplexed readout for a spatio-spectral focal plane instrument basedon low temperature detectors. A trade-off analysis of different FPGA carrierboards is presented in an attempt to find an optimum next-generation solutionfor reading out larger arrays of Microwave Kinetic Inductance Detectors(MKIDs). The ZCU111 RF SoC FPGA board from Xilinx was selected, and it is shownhow this integrated system promises to increase the number of pixels that canbe read out (per board) which enables a reduction in the readout cost perpixel, the mass and volume, and power consumption, all of which are importantin making MKID instruments more feasible for both ground-based and space-basedastrophysics. The on-chip logic capacity is shown to form a primary constrainton the number of MKIDs which can be read, channelised, and processed with thisnew system. As such, novel signal processing techniques are analysed, includingDigitally Down Converted (DDC)-corrected sub-maximally decimated sampling, inan effort to reduce logic requirements without compromising signal to noiseratio. It is also shown how combining the ZCU111 board with a secondary FPGAboard will allow all 8 ADCs and 8 DACs to be utilised, providing enoughbandwidth to read up to 8,000 MKIDs per board-set, an eight-fold improvementover the state-of-the-art, and important in pursuing 100,000 pixel arrays.Finally, the feasibility of extending the operational frequency range of MKIDsto the 5 - 10 GHz regime (or possibly beyond) is investigated, and somebenefits and consequences of doing so are presented.

Modeling Results and Baseline Design for an RF-SoC-Based Readout System for Microwave Kinetic Inductance Detectors