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DNN workloads can be scheduled onto DNN accelerators in many different ways:from layer-by-layer scheduling to cross-layer depth-first scheduling (a.k.a.layer fusion, or cascaded execution). This results in a very broad schedulingspace, with each schedule leading to varying hardware (HW) costs in terms ofenergy and latency. To rapidly explore this vast space for a wide variety ofhardware architectures, analytical cost models are crucial to estimatescheduling effects on the HW level. However, state-of-the-art cost models arelacking support for exploring the complete depth-first scheduling space, forinstance focusing only on activations while ignoring weights, or modeling onlyDRAM accesses while overlooking on-chip data movements. These limitationsprevent researchers from systematically and accurately understanding thedepth-first scheduling space.  After formalizing this design space, this work proposes a unified modelingframework, DeFiNES, for layer-by-layer and depth-first scheduling to fill inthe gaps. DeFiNES enables analytically estimating the hardware cost forpossible schedules in terms of both energy and latency, while considering dataaccess at every memory level. This is done for each schedule and HWarchitecture under study by optimally choosing the active part of the memoryhierarchy per unique combination of operand, layer, and feature map tile. Thehardware costs are estimated, taking into account both data computation anddata copy phases. The analytical cost model is validated against measured datafrom a taped-out depth-first DNN accelerator, DepFiN, showing good modelingaccuracy at the end-to-end neural network level. A comparison with generalizedstate-of-the-art demonstrates up to 10X better solutions found with DeFiNES.

DeFiNES: Enabling Fast Exploration of the Depth-first Scheduling Space for DNN Accelerators through Analytical Modeling