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Resistive Random-Access Memory (RRAM) is well-suited to accelerate neuralnetwork (NN) workloads as RRAM-based Processing-in-Memory (PIM) architecturesnatively support highly-parallel multiply-accumulate (MAC) operations that formthe backbone of most NN workloads. Unfortunately, NN workloads such astransformers require support for non-MAC operations (e.g., softmax) that RRAMcannot provide natively. Consequently, state-of-the-art works either integrateadditional digital logic circuits to support the non-MAC operations or offloadthe non-MAC operations to CPU/GPU, resulting in significant performance andenergy efficiency overheads due to data movement.  In this work, we propose NEON, a novel compiler optimization to enable theend-to-end execution of the NN workload in RRAM. The key idea of NEON is totransform each non-MAC operation into a lightweight yet highly-accurate neuralnetwork. Utilizing neural networks to approximate the non-MAC operationsprovides two advantages: 1) We can exploit the key strength of RRAM, i.e.,highly-parallel MAC operation, to flexibly and efficiently execute non-MACoperations in memory. 2) We can simplify RRAM's microarchitecture byeliminating the additional digital logic circuits while reducing the datamovement overheads. Acceleration of the non-MAC operations in memory enablesNEON to achieve a 2.28x speedup compared to an idealized digital logic-basedRRAM. We analyze the trade-offs associated with the transformation anddemonstrate feasible use cases for NEON across different substrates.

NEON: Enabling Efficient Support for Nonlinear Operations in Resistive RAM-based Neural Network Accelerators