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In this work, we report a novel design, one-transistor-one-inverter (1T1I),to satisfy high speed and low power on-chip training requirements. Byleveraging doped HfO2 with ferroelectricity, a non-volatile inverter issuccessfully demonstrated, enabling desired continuous weight transitionbetween negative and positive via the programmable threshold voltage (VTH) offerroelectric field-effect transistors (FeFETs). Compared with commonly useddesigns with the similar function, 1T1I uniquely achieves pure on-chip-basedweight transition at an optimized working current without relying on assistancefrom off-chip calculation units for signed-weight comparison, facilitatinghigh-speed training at low power consumption. Further improvements in linearityand training speed can be obtained via a two-transistor-one-inverter (2T1I)design. Overall, focusing on energy and time efficiencies, this work provides avaluable design strategy for future FeFET-based computing-in-memory (CiM).

A Novel Non-Volatile Inverter-based CiM: Continuous Sign Weight Transition and Low Power on-Chip Training