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Recent hardware-aware matrix-free algorithms for higher-order finite-element(FE) discretized matrix-vector multiplications reduce floating point operationsand data access costs compared to traditional sparse matrix approaches. Thiswork proposes efficient matrix-free algorithms for evaluating FE discretizedmatrix-multivector products on both multi-node CPU and GPU architectures. Weaddress a critical gap in existing matrix-free implementations, which are wellsuited only for the action of FE discretized matrices on a single vector. Weemploy batched evaluation strategies, with the batchsize tailored to underlyinghardware architectures, leading to better data locality and enabling furtherparallelization. On CPUs, we utilize even-odd decomposition, SIMDvectorization, and overlapping computation and communication strategies. OnGPUs, we employ strategies to overlap compute and data movement in conjunctionwith GPU shared memory, constant memory, and kernel fusion to reduce dataaccesses. Our implementation outperforms the baselines for Helmholtz operatoraction, achieving up to 1.4x improvement on one CPU node and up to 2.8x on oneGPU node, while reaching up to 4.4x and 1.5x improvement on multiple nodes forCPUs ($\sim 3000$ cores) and GPUs ($\sim$ 25 GPUs), respectively. We furtherbenchmark the performance of the proposed implementation for solving a modeleigenvalue problem for 1024 smallest eigenvalue-eigenvector pairs by employingthe Chebyshev Filtered Subspace Iteration method, achieving up to 1.5ximprovement on one CPU node and up to 2.2x on one GPU node while reaching up to3.0x and 1.4x improvement on multinode CPUs ($\sim 3000$ cores) and GPUs($\sim$ 25 GPUs), respectively.

Fast hardware-aware matrix-free algorithm for higher-order finite-element discretized matrix multivector products on distributed systems