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This paper presents novel techniques of using hybrid prototyping for earlypower-performance analysis of MPSoC designs with multiple clock domains. Thefundamental idea of hybrid prototyping is to simulate a design with multiplecores by creating an emulation kernel in software on top of a single physicalinstance of the core. However, so far hybrid prototyping has been limited tohomogeneous multicores running at the same clock frequency. Moreover, hybridprototyping has not yet been demonstrated for efficient design spaceexploration. Our work focuses on enhancing the capabilities of hybridprototyping, such that it can be applied to realistic multi-clock MPSoC designsas well to perform early power-performance evaluation of MPSoC designs. Ourexperiments using industrial strength applications such as JPEG, MP3 and PacketProcessing, demonstrate the high accuracy of our hybrid prototypes, and overtwo orders of magnitude improvement over software simulation speed. We alsodemonstrate that exploring over 150 design options using hybrid prototyping canbe done with high reliability in the order of minutes compared to multiple daysusing conventional FPGA prototyping.

Rapid design space exploration of multi-clock domain MPSoCs with hybrid prototyping