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Analog/mixed-signal circuit design is one of the most complex andtime-consuming stages in the whole chip design process. Due to various process,voltage, and temperature (PVT) variations from chip manufacturing, analogcircuits inevitably suffer from performance degradation. Although there hasbeen plenty of work on automating analog circuit design under the typicalcondition, limited research has been done on exploring robust designs underreal and unpredictable silicon variations. Automatic analog design againstvariations requires prohibitive computation and time costs. To address thechallenge, we present RobustAnalog, a robust circuit design framework thatinvolves the variation information in the optimization process. Specifically,circuit optimizations under different variations are considered as a set oftasks. Similarities among tasks are leveraged and competitions are alleviatedto realize a sample-efficient multi-task training. Moreover, RobustAnalogprunes the task space according to the current performance in each iteration,leading to a further simulation cost reduction. In this way, RobustAnalog canrapidly produce a set of circuit parameters that satisfies diverse constraints(e.g. gain, bandwidth, noise...) across variations. We compare RobustAnalogwith Bayesian optimization, Evolutionary algorithm, and Deep DeterministicPolicy Gradient (DDPG) and demonstrate that RobustAnalog can significantlyreduce required optimization time by 14-30 times. Therefore, our study providesa feasible method to handle various real silicon conditions.

RobustAnalog: Fast Variation-Aware Analog Circuit Design Via Multi-task RL