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Fault attacks are active, physical attacks that an adversary can leverage toalter the control-flow of embedded devices to gain access to sensitiveinformation or bypass protection mechanisms. Due to the severity of theseattacks, manufacturers deploy hardware-based fault defenses intosecurity-critical systems, such as secure elements. The development of thesecountermeasures is a challenging task due to the complex interplay of circuitcomponents and because contemporary design automation tools tend to optimizeinserted structures away, thereby defeating their purpose. Hence, it iscritical that such countermeasures are rigorously verified post-synthesis. Asclassical functional verification techniques fall short of assessing theeffectiveness of countermeasures, developers have to resort to methods capableof injecting faults in a simulation testbench or into a physical chip. However,developing test sequences to inject faults in simulation is an error-prone taskand performing fault attacks on a chip requires specialized equipment and isincredibly time-consuming. To that end, this paper introduces SYNFI, a formalpre-silicon fault verification framework that operates on synthesized netlists.SYNFI can be used to analyze the general effect of faults on the input-outputrelationship in a circuit and its fault countermeasures, and thus enableshardware designers to assess and verify the effectiveness of embeddedcountermeasures in a systematic and semi-automatic way. To demonstrate thatSYNFI is capable of handling unmodified, industry-grade netlists synthesizedwith commercial and open tools, we analyze OpenTitan, the first open-sourcesecure element. In our analysis, we identified critical security weaknesses inthe unprotected AES block, developed targeted countermeasures, reassessed theirsecurity, and contributed these countermeasures back to the OpenTitanrepository.

SYNFI: Pre-Silicon Fault Analysis of an Open-Source Secure Element