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A novel background calibration technique for Time-InterleavedAnalog-to-Digital Converters (TI-ADCs) is presented in this paper. Thistechnique is applicable to equalized digital communication receivers. As shownby Tsai et al. [1] and Luna et al. [2], in a digital receiver it is possible totreat the TI-ADC errors as part of the communication channel and take advantageof the adaptive equalizer to compensate them. Therefore calibration becomes anintegral part of the channel equalization. No special purpose analog or digitalcalibration blocks or algorithms are required. However, there is a large classof receivers where the equalization technique cannot be directly appliedbecause other signal processing blocks are located between the TI-ADC and theequalizer. The technique presented here generalizes earlier works to this classof receivers. The error backpropagation algorithm, traditionally used inmachine learning, is applied to the error computed at the receiver slicer andused to adapt an auxiliary equalizer adjacent to the TI-ADC, called theCompensation Equalizer (CE). Simulations using a dual polarization opticalcoherent receiver model demonstrate accurate and robust mismatch compensationacross different application scenarios. Several Quadrature Amplitude Modulation(QAM) schemes are tested in simulations and experimentally. Measurements on anemulation platform which includes an 8 bit, 4 GS/s TI-ADC prototype chipfabricated in 130nm CMOS technology, show an almost ideal mitigation of theimpact of the mismatches on the receiver performance when 64-QAM and 256-QAMschemes are tested. An absolute improvement in the TI-ADC performance of$\sim$15 dB in both SNDR and SFDR is measured.

Design and Experimental Verification of a Novel  Error-Backpropagation-Based Background Calibration for Time Interleaved ADC  in Digital Communication Receivers