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In this study, a time fractional dual-phase-lag model with temperature jumpboundary condition as a choice for the Fourier's law replacement in thermalmodeling of transistors, is utilized. In more details, the numerical simulationof heat transfer in newly proposed TMTC field effect transistors usingfractional DPL equation has been investigated. Moreover, the Caputo fractionalderivative is employed to formulate the finite difference scheme fordiscretization of the fractional DPL model. In order to obtain more preciseresults for the peak temperature rise, the temperature and heat flux profiles,the size-dependent thermal properties are taken into account. Also, thetemperature jump boundary condition has been also applied by means of amixed-type boundary condition. It is obtained that considering size-dependentthermal characteristics for transistors under study, results in increase of thepeak temperature rise up to 250 percent. Furthermore, considering constant bulkthermal properties for the silicon MOSFET, certain oscillations are observed inthe time-variation of the peak temperature rise for alpha= 0.7, 0.9 and 1. Thispresents the so-called negative bias temperature instability appearing inelectronic nano-semiconductor devices. Finally, the hotspot temperature hasbeen researched in transistors containing two-dimensional materials with quasione-dimensional band structure channels. It is obtained that among the studiedFETs, titanium trisulfide with maximum temperature increase of 19.63 K exhibitsthe least peak temperature rise. This presents that TiS3 may be an acceptablesilicon channel replacement as far as the thermal issues are concerned.

A time-fractional dual-phase-lag framework to investigate transistors with TMTC channels (TiS3, In4Se3) and size-dependent properties