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As spatial and temporal resolutions of scientific instruments improve, theexplosion in the volume of data produced is becoming a key challenge. It can bea critical bottleneck for integration between scientific instruments at theedge and high-performance computers/emerging accelerators. Placing datacompression or reduction logic close to the data source is a possible approachto solve the bottleneck. However, the realization of such a solution requiresthe development of custom ASIC designs, which is still challenging in practiceand tends to produce one-off implementations unusable beyond the initialintended scope. Therefore, as a feasibility study, we have been investigating adesign workflow that allows us to explore algorithmically complex hardwaredesigns and develop reusable hardware libraries for the needs of scientificinstruments at the edge. Our vision is to cultivate our hardware developmentcapability for streaming/dataflow hardware components that can be placed closeto the data source to enable extreme data-intensive scientific experiments orenvironmental sensing. Furthermore, reducing data movement is essential toimproving computing performance in general. Therefore, our co-design efforts onstreaming hardware components can benefit computing applications other thanscientific instruments. This vision paper discusses hardware specializationneeds in scientific instruments and briefly reviews our progress leveraging theChisel hardware description language and emerging open-source hardwareecosystems, including a few design examples.

A Hardware Co-design Workflow for Scientific Instruments at the Edge