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To inform research activities in HPC interconnect of strategic importance tothe USG beyond 2018, in January of 2018, the DoD sponsored the 2nd Photonicsand Electronics Technology for Extreme-scale Computing (REPETE) workgroup.REPETE investigated new challenges in the area of HPC interconnect inspired bytechnology trends and challenges of vital importance to USG stakeholders.  The REPETE Working group investigated two focus areas of interest to the USG:Socket Level Photonic IO and Cryogenic Photonic IO. The working group spannedindustry, academia, and government, in research, development, product, andtechnology investment areas.  The workgroup team focusing on current and future design challenges forsocket level photonic IO began discussing technical challenges and currentstate of applying photonics to off-chip IO in April of 2019 through biweeklymeetings that concluded in early September of 2019. The focus of these meetingswas to discuss what technology exists for moving the conversion of electricalsignaling to photonic signaling from the node (as is currently done) down towithin the socket for off-chip IO.  Areas discussed include: I/O Requirements and Trends at the Compute Socketfor 2025 and Beyond; Current and Near-Term Copper Solutions for Off-Chip,Socket-Level Interconnect; Current Photonic Solutions for Off-Chip orSocket-Level Interconnect; Light Generation for Off-Chip, Socket-Level IO;Fabrication and Packaging of Photonic Integrated Circuits; All-PhotonicSwitching Technology; and Simulation of Photonic Interconnects.

Findings of the 2nd Photonics and Electronics Technology for Extreme  Scale Computing Workgroup (REPETE): Design Challenges for Socket Level  Photonic I/O