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Many of today's deep neural network accelerators, e.g., Google's TPU andNVIDIA's tensor core, are built around accelerating the general matrixmultiplication (i.e., GEMM). However, supporting convolution on GEMM-basedaccelerators is not trivial. The naive method explicitly lowers the convolutionto GEMM, commonly known as im2col, which introduces significant performance andmemory overhead. Existing implicit im2col algorithms require unscalablehardware and are inefficient in supporting important convolution variants suchas strided convolution. In this paper, we propose a memory-efficient andhardware-friendly implicit im2col algorithm used by Google's TPU, whichdynamically converts a convolution into a GEMM with practically zeroperformance and memory overhead, fully unleashing the power of GEMM engines.Through comprehensive experimental results, we quantitatively argue that thisalgorithm has been adopted in commercial closed-source platforms, and we arethe first to describe its high-level idea and implementation details. Finally,we show that our algorithm can also be generally applied to Nvidia's TensorCores (TC), matching and out-performing the measured performance on TCs.

Characterizing and Demystifying the Implicit Convolution Algorithm on Commercial Matrix-Multiplication Accelerators