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We investigate how hardware specifications can impact the final run time andthe required number of physical qubits to achieve a quantum advantage in thefault tolerant regime. Within a particular time frame, both the code cycle timeand the number of achievable physical qubits may vary by orders of magnitudebetween different quantum hardware designs. We start with logical resourcerequirements corresponding to a quantum advantage for a particular chemistryapplication, simulating the FeMoco molecule, and explore to what extent slowercode cycle times can be mitigated by using additional qubits. We show that incertain situations architectures with considerably slower code cycle times willstill be able to reach desirable run times, provided enough physical qubits areavailable. We utilize various space and time optimization strategies that havebeen previously considered within the field of error-correcting surface codes.In particular, we compare two distinct methods of parallelization, Game ofSurface Code's Units, and AutoCCZ factories, both of which enable one toincrementally speed up the computation until the reaction limited rate isreached. Finally we calculate the number of physical qubits which would berequired to break the 256 bit elliptic curve encryption of keys in the Bitcoinnetwork, within the small available time frame in which it would actually posea threat to do so. It would require approximately 317 million physical qubitsto break the encryption within one hour using the surface code, a code cycletime of 1 $ \mu s$, a reaction time of 10 $ \mu s$, and physical gate error of$10^{-3}$. To break the encryption instead within one day it would require 13million physical qubits.

The Impact of Hardware Specifications on Reaching Quantum Advantage in the Fault Tolerant Regime