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Quantum random number generators (QRNG) based on continuous variable (CV)quantum fluctuations offer great potential for their advantages in measurementbandwidth, stability and integrability. More importantly, it provides anefficient and extensible path for significant promotion of QRNG generationrate. During this process, real-time randomness extraction using informationtheoretically secure randomness extractors is vital, because it plays criticalrole in the limit of throughput rate and implementation cost of QRNGs. In thiswork, we investigate parallel and real-time realization of severalToeplitz-hashing extractors within one field-programmable gate array (FPGA) forparallel QRNG. Elaborate layout of Toeplitz matrixes and efficient utilizationof hardware computing resource in the FPGA are emphatically studied. Logicsource occupation for different scale and quantity of Toeplitz matrices isanalyzed and two-layer parallel pipeline algorithm is delicately designed tofully exploit the parallel algorithm advantage and hardware source of the FPGA.This work finally achieves a real-time post-processing rate of QRNG above 8Gbps. Matching up with integrated circuit for parallel extraction of multiplequantum sideband modes of vacuum state, our demonstration shows an importantstep towards chip-based parallel QRNG, which could effectively improve thepracticality of CV QRNGs, including device trusted, device-independent, andsemi-device-independent schemes.

Parallel and real-time post-processing for quantum random number generators