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In-Memory Computing (IMC) hardware using Memristive Crossbar Arrays (MCAs)are gaining popularity to accelerate Deep Neural Networks (DNNs) since italleviates the "memory wall" problem associated with von-Neumann architecture.The hardware efficiency (energy, latency and area) as well as applicationaccuracy (considering device and circuit non-idealities) of DNNs mapped to suchhardware are co-dependent on network parameters, such as kernel size, depthetc. and hardware architecture parameters such as crossbar size. However,co-optimization of both network and hardware parameters presents a challengingsearch space comprising of different kernel sizes mapped to varying crossbarsizes. To that effect, we propose NAX -- an efficient neural architecturesearch engine that co-designs neural network and IMC based hardwarearchitecture. NAX explores the aforementioned search space to determine kerneland corresponding crossbar sizes for each DNN layer to achieve optimaltradeoffs between hardware efficiency and application accuracy. Our resultsfrom NAX show that the networks have heterogeneous crossbar sizes acrossdifferent network layers, and achieves optimal hardware efficiency and accuracyconsidering the non-idealities in crossbars. On CIFAR-10 and Tiny ImageNet, ourmodels achieve 0.8%, 0.2% higher accuracy, and 17%, 4% lower EDAP(energy-delay-area product) compared to a baseline ResNet-20 and ResNet-18models, respectively.

NAX: Co-Designing Neural Network and Hardware Architecture for Memristive Xbar based Computing Systems