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Brain-inspired computing and neuromorphic hardware are promising approachesthat offer great potential to overcome limitations faced by current computingparadigms based on traditional von-Neumann architecture. In this regard,interest in developing memristor crossbar arrays has increased due to theirability to natively perform in-memory computing and fundamental synapticoperations required for neural network implementation. For optimal efficiency,crossbar-based circuits need to be compatible with fabrication processes andmaterials of industrial CMOS technologies. Herein, we report a completeCMOS-compatible fabrication process of TiO2-based passive memristor crossbarswith 700 nm wide electrodes. We show successful bottom electrode fabrication bya damascene process, resulting in an optimised topography and a surfaceroughness as low as 1.1 nm. DC sweeps and voltage pulse programming yieldstatistical results related to synaptic-like multilevel switching. Bothcycle-to-cycle and device-to-device variability are investigated. Analogueprogramming of the conductance using sequences of 200 ns voltage pulses suggestthat the fabricated memories have a multilevel capacity of at least 3 bits dueto the cycle-to-cycle reproducibility.

Fully CMOS-compatible passive TiO2-based memristor crossbars for in-memory computing