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The architecture of a coarse-grained reconfigurable array (CGRA) processingelement (PE) has a significant effect on the performance and energy efficiencyof an application running on the CGRA. This paper presents an automatedapproach for generating specialized PE architectures for an application or anapplication domain. Frequent subgraphs mined from a set of applications aremerged to form a PE architecture specialized to that application domain. Forthe image processing and machine learning domains, we generate specialized PEsthat are up to 10.5x more energy efficient and consume 9.1x less area than abaseline PE.

Automated Design Space Exploration of CGRA Processing Element Architectures using Frequent Subgraph Analysis