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Phase-change memory (PCM) is a scalable and low latency non-volatile memory(NVM) technology that has been proposed to serve as storage class memory (SCM),providing low access latency similar to DRAM and often approaching or exceedingthe capacity of SSD. The multilevel property of PCM also enables its adoptionin neuromorphic systems to build high-density synaptic storage. We investigateand describe two significant bottlenecks of a PCM system. First, writing to PCMcells incurs significantly higher latency and energy penalties than reading itscontent. Second, high operating voltages of PCM impacts its reliableoperations. In this work, we propose methodologies to tackle the bottlenecks,improving performance, reliability, energy consumption, and sustainability fora PCM system.

Design Methodologies for Reliable and Energy-efficient PCM Systems