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A Large Ion Collider Experiment (ALICE) is one of the four major experimentsconducted at the CERN Large Hadron Collider (LHC). The ALICE detector iscurrently undergoing an upgrade for the upcoming Run 3 at the LHC. The newInner Tracking System (ITS) sub-detector is part of this upgrade. The front-endelectronics of the ITS is composed by 192 Readout Units, installed in aradiation environment. Single Event Upsets (SEUs) in the SRAM-based XilinxKintex Ultrascale FPGAs used in the ITS readout represent a real concern. Toclear SEUs affecting the Kintex configuration memory, a secondary Flash-basedMicrosemi ProASIC3E (PA3) FPGA is used. This device configures and continuouslyscrubs the Xilinx FPGA while data-taking is ongoing, which avoids accumulationof SEUs. The communication path to the RUs is via the radiation hard GigabitTransceiver (GBT) system on 100 m long optical links. The PA3 is reachable viathe GBT Slow Control Adapter (GBT-SCA) ASIC using a dedicated JTAG bus drivingchannel. During the course of Run 3, it is foreseeable that the FPGA design ofthe PA3 will require upgrades to correct possible issues and add newfunctionality. It is therefore mandatory that the PA3 itself can be configuredremotely, for which a dedicated software tool is needed. This paper presentsthe design and implementation of the distributed tools to re-configure remotelythe PA3 FPGAs.

Remote Configuration of the ProASIC3 on the ALICE Inner Tracking System Readout Unit