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FPGA accelerators on the NIC enable the offloading of expensive packetprocessing tasks from the CPU. However, FPGAs have limited resources that mayneed to be shared among diverse applications, and programming them isdifficult.  We present a solution to run Linux's eXpress Data Path programs written ineBPF on FPGAs, using only a fraction of the available hardware resources whilematching the performance of high-end CPUs. The iterative execution model ofeBPF is not a good fit for FPGA accelerators. Nonetheless, we show that many ofthe instructions of an eBPF program can be compressed, parallelized orcompletely removed, when targeting a purpose-built FPGA executor, therebysignificantly improving performance. We leverage that to design hXDP, whichincludes (i) an optimizing-compiler that parallelizes and translates eBPFbytecode to an extended eBPF Instruction-set Architecture defined by us; a (ii)soft-CPU to execute such instructions on FPGA; and (iii) an FPGA-basedinfrastructure to provide XDP's maps and helper functions as defined within theLinux kernel.  We implement hXDP on an FPGA NIC and evaluate it running real-worldunmodified eBPF programs. Our implementation is clocked at 156.25MHz, usesabout 15% of the FPGA resources, and can run dynamically loaded programs.Despite these modest requirements, it achieves the packet processing throughputof a high-end CPU core and provides a 10x lower packet forwarding latency.

hXDP: Efficient Software Packet Processing on FPGA NICs