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Adopting FPGA as an accelerator in datacenters is becoming mainstream forcustomized computing, but the fact that FPGAs are hard to program creates asteep learning curve for software programmers. Even with the help of high-levelsynthesis (HLS), accelerator designers still have to manually perform codereconstruction and cumbersome parameter tuning to achieve the optimalperformance. While many learning models have been leveraged by existing work toautomate the design of efficient accelerators, the unpredictability of modernHLS tools becomes a major obstacle for them to maintain high accuracy. Toaddress this problem, we propose an automated DSE framework-AutoDSE- thatleverages a bottleneck-guided coordinate optimizer to systematically find abetter design point. AutoDSE detects the bottleneck of the design in each stepand focuses on high-impact parameters to overcome it. The experimental resultsshow that AutoDSE is able to identify the design point that achieves, on thegeometric mean, 19.9x speedup over one CPU core for Machsuite and Rodiniabenchmarks. Compared to the manually optimized HLS vision kernels in XilinxVitis libraries, AutoDSE can reduce their optimization pragmas by 26.38x whileachieving similar performance. With less than one optimization pragma perdesign on average, we are making progress towards democratizing customizablecomputing by enabling software programmers to design efficient FPGAaccelerators.

AutoDSE: Enabling Software Programmers to Design Efficient FPGA Accelerators